AVR library
mfrc522.h
1 #ifndef MFRC522_h
2 #define MFRC522_h
3 
4  #include <inttypes.h>
5 
6  typedef uint8_t bool;
7  typedef uint8_t byte;
8  typedef uint16_t word;
9 
10  // MFRC522 registers. Described in chapter 9 of the datasheet.
11  // When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3)
12  enum PCD_Register {
13  // Page 0: Command and status
14  // 0x00 // reserved for future use
15  CommandReg = 0x01 << 1, // starts and stops command execution
16  ComIEnReg = 0x02 << 1, // enable and disable interrupt request control bits
17  DivIEnReg = 0x03 << 1, // enable and disable interrupt request control bits
18  ComIrqReg = 0x04 << 1, // interrupt request bits
19  DivIrqReg = 0x05 << 1, // interrupt request bits
20  ErrorReg = 0x06 << 1, // error bits showing the error status of the last command executed
21  Status1Reg = 0x07 << 1, // communication status bits
22  Status2Reg = 0x08 << 1, // receiver and transmitter status bits
23  FIFODataReg = 0x09 << 1, // input and output of 64 byte FIFO buffer
24  FIFOLevelReg = 0x0A << 1, // number of bytes stored in the FIFO buffer
25  WaterLevelReg = 0x0B << 1, // level for FIFO underflow and overflow warning
26  ControlReg = 0x0C << 1, // miscellaneous control registers
27  BitFramingReg = 0x0D << 1, // adjustments for bit-oriented frames
28  CollReg = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface
29  // 0x0F // reserved for future use
30 
31  // Page 1:Command
32  // 0x10 // reserved for future use
33  ModeReg = 0x11 << 1, // defines general modes for transmitting and receiving
34  TxModeReg = 0x12 << 1, // defines transmission data rate and framing
35  RxModeReg = 0x13 << 1, // defines reception data rate and framing
36  TxControlReg = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2
37  TxASKReg = 0x15 << 1, // controls the setting of the transmission modulation
38  TxSelReg = 0x16 << 1, // selects the internal sources for the antenna driver
39  RxSelReg = 0x17 << 1, // selects internal receiver settings
40  RxThresholdReg = 0x18 << 1, // selects thresholds for the bit decoder
41  DemodReg = 0x19 << 1, // defines demodulator settings
42  // 0x1A // reserved for future use
43  // 0x1B // reserved for future use
44  MfTxReg = 0x1C << 1, // controls some MIFARE communication transmit parameters
45  MfRxReg = 0x1D << 1, // controls some MIFARE communication receive parameters
46  // 0x1E // reserved for future use
47  SerialSpeedReg = 0x1F << 1, // selects the speed of the serial UART interface
48 
49  // Page 2: Configuration
50  // 0x20 // reserved for future use
51  CRCResultRegH = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation
52  CRCResultRegL = 0x22 << 1,
53  // 0x23 // reserved for future use
54  ModWidthReg = 0x24 << 1, // controls the ModWidth setting?
55  // 0x25 // reserved for future use
56  RFCfgReg = 0x26 << 1, // configures the receiver gain
57  GsNReg = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation
58  CWGsPReg = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation
59  ModGsPReg = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation
60  TModeReg = 0x2A << 1, // defines settings for the internal timer
61  TPrescalerReg = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg.
62  TReloadRegH = 0x2C << 1, // defines the 16-bit timer reload value
63  TReloadRegL = 0x2D << 1,
64  TCounterValueRegH = 0x2E << 1, // shows the 16-bit timer value
65  TCounterValueRegL = 0x2F << 1,
66 
67  // Page 3:Test Registers
68  // 0x30 // reserved for future use
69  TestSel1Reg = 0x31 << 1, // general test signal configuration
70  TestSel2Reg = 0x32 << 1, // general test signal configuration
71  TestPinEnReg = 0x33 << 1, // enables pin output driver on pins D1 to D7
72  TestPinValueReg = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus
73  TestBusReg = 0x35 << 1, // shows the status of the internal test bus
74  AutoTestReg = 0x36 << 1, // controls the digital self test
75  VersionReg = 0x37 << 1, // shows the software version
76  AnalogTestReg = 0x38 << 1, // controls the pins AUX1 and AUX2
77  TestDAC1Reg = 0x39 << 1, // defines the test value for TestDAC1
78  TestDAC2Reg = 0x3A << 1, // defines the test value for TestDAC2
79  TestADCReg = 0x3B << 1 // shows the value of ADC I and Q channels
80  // 0x3C // reserved for production tests
81  // 0x3D // reserved for production tests
82  // 0x3E // reserved for production tests
83  // 0x3F // reserved for production tests
84  };
85 
86  // MFRC522 comands. Described in chapter 10 of the datasheet.
87  enum PCD_Command {
88  PCD_Idle = 0x00, // no action, cancels current command execution
89  PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
90  PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
91  PCD_CalcCRC = 0x03, // activates the CRC coprocessor or performs a self test
92  PCD_Transmit = 0x04, // transmits data from the FIFO buffer
93  PCD_NoCmdChange = 0x07, // no command change, can be used to modify the CommandReg register bits without affecting the command, for example, the PowerDown bit
94  PCD_Receive = 0x08, // activates the receiver circuits
95  PCD_Transceive = 0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission
96  PCD_MFAuthent = 0x0E, // performs the MIFARE standard authentication as a reader
97  PCD_SoftReset = 0x0F // resets the MFRC522
98  };
99 
100  // Commands sent to the PICC.
101  enum PICC_Command {
102  // The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
103  PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
104  PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
105  PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision.
106  PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
107  PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 1
108  PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 1
109  PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
110  // The commands used for MIFARE Classic (from http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9)
111  // Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on the sector.
112  // The read/write commands can also be used for MIFARE Ultralight.
113  PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
114  PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
115  PICC_CMD_MF_READ = 0x30, // Reads one 16 byte block from the authenticated sector of the PICC. Also used for MIFARE Ultralight.
116  PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 byte block to the authenticated sector of the PICC. Called "COMPATIBILITY WRITE" for MIFARE Ultralight.
117  PICC_CMD_MF_DECREMENT = 0xC0, // Decrements the contents of a block and stores the result in the internal data register.
118  PICC_CMD_MF_INCREMENT = 0xC1, // Increments the contents of a block and stores the result in the internal data register.
119  PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register.
120  PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block.
121  // The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
122  // The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight.
123  PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
124  };
125 
126  // MIFARE constants that does not fit anywhere else
127  enum MIFARE_Misc {
128  MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other value than 0xA is NAK.
129  MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
130  };
131 
132  // PICC types we can detect. Remember to update PICC_GetTypeName() if you add more.
133  enum PICC_Type {
134  PICC_TYPE_UNKNOWN = 0,
135  PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4
136  PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC)
137  PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes
138  PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB
139  PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB
140  PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C
141  PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus
142  PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type Identification Procedure
143  PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete.
144  };
145 
146  // Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more.
147  enum StatusCode {
148  STATUS_OK = 1, // Success
149  STATUS_ERROR = 2, // Error in communication
150  STATUS_COLLISION = 3, // Collission detected
151  STATUS_TIMEOUT = 4, // Timeout in communication.
152  STATUS_NO_ROOM = 5, // A buffer is not big enough.
153  STATUS_INTERNAL_ERROR = 6, // Internal error in the code. Should not happen ;-)
154  STATUS_INVALID = 7, // Invalid argument.
155  STATUS_CRC_WRONG = 8, // The CRC_A does not match
156  STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK.
157  };
158 
159  // A struct used for passing the UID of a PICC.
160  typedef struct {
161  byte size; // Number of bytes in the UID. 4, 7 or 10.
162  byte uidByte[10];
163  byte sak; // The SAK (Select acknowledge) byte returned from the PICC after successful selection.
164  } Uid;
165 
166  // A struct used for passing a MIFARE Crypto1 key
167  typedef struct {
168  byte keyByte[MF_KEY_SIZE];
169  } MIFARE_Key;
170 
171  // Member variables
172  //Uid uid; // Used by PICC_ReadCardSerial().
173 
174  // Size of the MFRC522 FIFO
175  //static const byte FIFO_SIZE = 64; // The FIFO is 64 bytes.
176 
177  //-----------------------------------------------------------------------------------
178  // Functions for setting up the Arduino
179  //-----------------------------------------------------------------------------------
180  void MFRC522_init(void);
181  void setSPIConfig(void);
182 
183  //-----------------------------------------------------------------------------------
184  // Basic interface functions for communicating with the MFRC522
185  //-----------------------------------------------------------------------------------
186  void PCD_WriteRegister(byte reg, byte value);
187  void PCD_WriteRegister2(byte reg, byte count, byte *values);
188  byte PCD_ReadRegister(byte reg);
189  void PCD_ReadRegister2(byte reg, byte count, byte *values, byte rxAlign);
190  void setBitMask(unsigned char reg, unsigned char mask);
191  void PCD_SetRegisterBitMask(byte reg, byte mask);
192  void PCD_ClearRegisterBitMask(byte reg, byte mask);
193  byte PCD_CalculateCRC(byte *data, byte length, byte *result);
194 
195  //-----------------------------------------------------------------------------------
196  // Functions for manipulating the MFRC522
197  //-----------------------------------------------------------------------------------
198  byte PCD_Init(void);
199  byte PCD_Reset(void);
200  void PCD_AntennaOn(void);
201 
202  //-----------------------------------------------------------------------------------
203  // Functions for communicating with PICCs
204  //-----------------------------------------------------------------------------------
205  byte PCD_TransceiveData(byte *sendData, byte sendLen, byte *backData, byte *backLen, byte *validBits, byte rxAlign, bool checkCRC);
206  byte PCD_CommunicateWithPICC(byte command, byte waitIRq, byte *sendData, byte sendLen, byte *backData, byte *backLen, byte *validBits, byte rxAlign, bool checkCRC);
207 
208  byte PICC_RequestA(byte *bufferATQA, byte *bufferSize);
209  byte PICC_WakeupA(byte *bufferATQA, byte *bufferSize);
210  byte PICC_REQA_or_WUPA( byte command, byte *bufferATQA, byte *bufferSize);
211  byte PICC_Select(Uid *uid, byte validBits);
212  byte PICC_HaltA(void);
213 
214  //-----------------------------------------------------------------------------------
215  // Functions for communicating with MIFARE PICCs
216  //-----------------------------------------------------------------------------------
217  byte PCD_Authenticate(byte command, byte blockAddr, MIFARE_Key *key, Uid *uid);
218  void PCD_StopCrypto1(void);
219  byte MIFARE_Read(byte blockAddr, byte *buffer, byte *bufferSize);
220  byte MIFARE_Write(byte blockAddr, byte *buffer, byte bufferSize);
221  byte MIFARE_Decrement(byte blockAddr, long delta);
222  byte MIFARE_Increment(byte blockAddr, long delta);
223  byte MIFARE_Restore(byte blockAddr);
224  byte MIFARE_Transfer(byte blockAddr);
225  byte MIFARE_Ultralight_Write(byte page, byte *buffer, byte bufferSize);
226 
227  //-----------------------------------------------------------------------------------
228  // Support functions
229  //-----------------------------------------------------------------------------------
230  byte PCD_MIFARE_Transceive( byte *sendData, byte sendLen, bool acceptTimeout);
231  const char *GetStatusCodeName(byte code);
232  byte PICC_GetType(byte sak);
233  const char *PICC_GetTypeName(byte type);
234  void PICC_DumpToSerial(Uid *uid);
235  void PICC_DumpMifareClassicToSerial(Uid *uid, byte piccType, MIFARE_Key *key);
236  void PICC_DumpMifareClassicSectorToSerial(Uid *uid, MIFARE_Key *key, byte sector);
237  void PICC_DumpMifareUltralightToSerial(void);
238  void MIFARE_SetAccessBits(byte *accessBitBuffer, byte g0, byte g1, byte g2, byte g3);
239 
240  //-----------------------------------------------------------------------------------
241  // Convenience functions - does not add extra functionality
242  //-----------------------------------------------------------------------------------
243  bool PICC_IsNewCardPresent(void);
244  bool PICC_ReadCardSerial(Uid* uid);
245 
246 /*
247 private:
248  byte _chipSelectPin; // Arduino pin connected to MFRC522's SPI slave select input (Pin 24, NSS, active low)
249  byte _resetPowerDownPin; // Arduino pin connected to MFRC522's reset and power down input (Pin 6, NRSTPD, active low)
250  byte MIFARE_TwoStepHelper(byte command, byte blockAddr, long data);
251 */
252 
253 #endif
byte PCD_TransceiveData(byte *sendData, byte sendLen, byte *backData, byte *backLen, byte *validBits, byte rxAlign, bool checkCRC)
Definition: mfrc522.c:255
Definition: mfrc522.h:160
byte PCD_MIFARE_Transceive(byte *sendData, byte sendLen, bool acceptTimeout)
Definition: mfrc522.c:951
bool PICC_ReadCardSerial(Uid *uid)
Definition: mfrc522.c:1387
byte PICC_Select(Uid *uid, byte validBits)
Definition: mfrc522.c:435
byte PCD_CalculateCRC(byte *data, byte length, byte *result)
Definition: mfrc522.c:150
void PCD_WriteRegister(byte reg, byte value)
Definition: mfrc522.c:45
byte PCD_CommunicateWithPICC(byte command, byte waitIRq, byte *sendData, byte sendLen, byte *backData, byte *backLen, byte *validBits, byte rxAlign, bool checkCRC)
Definition: mfrc522.c:273
void PCD_SetRegisterBitMask(byte reg, byte mask)
Definition: mfrc522.c:125
void PCD_AntennaOn()
Definition: mfrc522.c:238
void PCD_WriteRegister2(byte reg, byte count, byte *values)
Definition: mfrc522.c:58
void PCD_StopCrypto1()
Definition: mfrc522.c:721
byte MIFARE_Write(byte blockAddr, byte *buffer, byte bufferSize)
Definition: mfrc522.c:777
byte PICC_REQA_or_WUPA(byte command, byte *bufferATQA, byte *bufferSize)
Definition: mfrc522.c:396
Definition: mfrc522.h:167
byte PCD_Authenticate(byte command, byte blockAddr, MIFARE_Key *key, Uid *uid)
Definition: mfrc522.c:695
byte PCD_Init()
Definition: mfrc522.c:188
byte MIFARE_Read(byte blockAddr, byte *buffer, byte *bufferSize)
Definition: mfrc522.c:742
byte PCD_Reset()
Definition: mfrc522.c:217
void PCD_ReadRegister2(byte reg, byte count, byte *values, byte rxAlign)
Definition: mfrc522.c:88
bool PICC_IsNewCardPresent()
Definition: mfrc522.c:1372
void PCD_ClearRegisterBitMask(byte reg, byte mask)
Definition: mfrc522.c:136
byte PICC_WakeupA(byte *bufferATQA, byte *bufferSize)
Definition: mfrc522.c:384
byte PCD_ReadRegister(byte reg)
Definition: mfrc522.c:74
byte PICC_RequestA(byte *bufferATQA, byte *bufferSize)
Definition: mfrc522.c:372
byte PICC_HaltA()
Definition: mfrc522.c:650